Transistors, such as metal oxide semiconductor field-effect transistors (MOSFETs), are the core building block of the vast majority of semiconductor devices. Some semiconductor devices, such as high performance processor devices, can include millions of transistors. For such devices, decreasing transistors size, and thus increasing transistor density, has traditionally been a high priority in the semiconductor manufacturing industry.
A FinFET is a type of transistor that can be fabricated using very small scale processes. FIG. 1 is a simplified perspective view of a FinFET 100, which is formed on a semiconductor wafer substrate 102. A FinFET is named for its use of one or more conductive fins (FinFET 100 includes only one fin 104). As shown in FIG. 1, fin 104 extends between a source region 106 and a drain region 108 of FinFET 100. FinFET 100 includes a gate structure 110 that is wrapped around fin 104. The dimensions of fin 104 as wrapped by gate structure 110 determine the effective channel of FinFET 100. Accordingly, the height of fin 104 is an important dimension—the height generally corresponds to the gate/channel length of a traditional transistor. FIG. 2 is a simplified perspective view of another FinFET 200; this particular version includes three fins 202 extending between a source region 204 and a drain region 206. As with FinFET 100, a gate structure 208 is formed across the three fins 202. When multiple fins are employed in this manner, it can be extremely important to maintain uniform fin dimensions, including fin height, thickness, and pitch (the distance between two adjacent fins, plus fin thickness).
FinFET devices have historically been formed using silicon-on-insulator (SOI) substrates. Using an SOI substrate, the conductive fins are formed from the silicon material, while the insulator layer provides isolation between adjacent FinFET devices. The insulator layer also serves to define the height of the fins during manufacturing. Bulk silicon substrates are less expensive than SOI substrates, and FinFET devices can also be fabricated using bulk silicon if appropriate isolation methodologies are utilized. However, such fabrication processes typically involve at least one polishing step (e.g., chemical mechanical polishing, which can represent another source of fin height variation, add to the manufacturing cost, and increase the manufacturing time.